GaN Template on Silicon

GaN Template on Si 4''dia. GaN thickness: 500 nm+/-100nm, Si(111) N-type ,P-doped ,R:1-5 ohm.cm

GaN Template on Si<111> 4''dia. GaN thickness: 500 nm+/-100nm, Si(111) N-type ,P-doped ,R:1-5 ohm.cm

기본 정보
Product Name GaN Template on Si<111> 4''dia. GaN thickness: 500 nm+/-100nm, Si(111) N-type ,P-doped ,R:1-5 ohm.cm
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Product Code FmGaNonSiPc101D05C1FT500nmUS
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상품 옵션
 

GaN Template on silicon is made by a hydride vapor phase epitaxy (HVPE)-based method. During the HVPE process, HCl reacts with molten Ga to form GaCl, which in turn reacts with NH3 to form GaN. GaN template on silicon is a cost effective way to replace GaN single crystal substrate.

Specifications 

  •      •  Research Grade , about 90 % useful  area
  •      •  Nominal GaN thickness:   0.5μm ± 0.1 μm
  •      •  Front Surface finish (Ga-face): <1nm RMS,  As-grown 
  •      •  Back surface finish: as received
  •      •  GaN orientation: C-plane (00.1)
  •      •  Polarity:  Ga-face
  •      •  Conduction Type:   Undoped (N-)  
  •      •  Macro Defect Density:   <5/cm^2  
  •      •  Wafer base: Silicon [111], N-type P-doped  R:1-5 ohm.cm;  4" diameter x 0.5mm, one side polished
  •      •  There is ~200nm AlN buffer layer between the silicon and GaN 


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